Synthworks VHDL Training Experts: About Us

Schedule
Core Courses
	Comprehensive VHDL Intro (4 Days)

	VHDL Testbenches & Verification (4 Days)

	VHDL Synthesis (4 Days)

Custom Courses
	VHDL Intro for Verilog (1-4 Days)

	Intermediate VHDL for Synthesis (2 Days)

	Advanced VHDL for Synthesis (2 Days)

	Intermediate VHDL (3-5 Days)

	Advanced VHDL (3-5 Days)

	Quick VHDL Intro (2 Days)

VHDL Papers

VHDL Links

About SynthWorks Design, Inc.
Our Instructors

Principal Trainer: Jim Lewis

Jim Lewis, the founder of SynthWorks, has twenty-two years of design, teaching, and problem solving experience. In addition to working as a Principal Trainer for SynthWorks, Mr. Lewis does ASIC and FPGA design, custom model development, and consulting. Mr. Lewis has created designs for hardware for print servers, IMA E1/T1, fighter jets, video phones, and space craft.

Mr. Lewis, who holds a BSEE/BSCEE and MSEE from Purdue University, is a member of the IEEE and the Eta Kappa Nu, and Tau Beta Pi Honor Societies. Mr. Lewis is chair of the IEEE 1076 VHDL Analysis and Standardization Working Group (VASG) and is an active member in IEEE and Accellera's VHDL standardization efforts.

To view Mr. Lewis' biography, click here.
To view Mr. Lewis' resume, click here.
For information about Mr. Lewis' consulting services, click here.

Senior Trainer: Charlie Guy

Charles Guy is an independent hardware design consultant with over 30 years of experience. His designs have covered the areas of cache, master sequencers, bus functional models, multiple types of buses and memory controllers. During that time he was awarded 4 patents for system bussing, caching and symmetric multiprocessing. Mr. Guy has worked on the PCMCIA and FutureBus+ committees. He has designed 6 ASICs and 4 FPGAs and is familiar with Model Technology and Synopsys design tools. Before becoming an independent consultant, Mr. Guy worked for Intel, Tektronix, Daisy Systems and Amdahl.

For information about Mr. Guy's consulting services, see http://www.avsyscorp.com.